SN54LV174, SN74LV174 HEX D-TYPE FLIP-FLOPS WITH CLEAR

SCLS192B - FEBRUARY 1993 - REVISED APRIL 1996

features

• EPIC^TM (Enhanced-Performance Implanted CMOS) 2- Process
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC, T_A = 25°C
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat (W) Packages, Chip Carriers (FK), and (J) 300-mil DIPs

  EPIC is a trademark of Texas Instruments Incorporated.

description

These hex D-type flip-flops are designed for 2.7-V to 5.5-VV_CC operation.

The 'LV174 are monolithic positive-edge- triggered flip-flops witha direct clear () input.Information at the data (D) inputs meeting the setup timerequirements is transferred to the outputs on the positive-going edgeof the clock pulse. Clock triggering occurs at a particular voltagelevel and is not directly related to the transition time of thepositive-going edge of the clock pulse. When the clock (CLK) input isat either the high or low level, the D-input signal has no effect atthe output.

The SN74LV174 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.

The SN54LV174 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LV174is characterized for operation from -40°C to 85°C.

View more information about generic part numbers:SN74LV174

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