SN54LV164, SN74LV164 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS

SCLS191B - FEBRUARY 1993 - REVISED APRIL 1996

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features

EPIC^TM (Enhanced-Performance Implanted CMOS) 2- Process
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC, T_A = 25°C
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW), Ceramic Flat (W) Packages, Chip Carriers (FK), and (J) 300-mil DIPs
EPIC is a trademark of Texas Instruments Incorporated.

description

These 8-bit parallel-out serial shift registers are designed for2.7-V to 5.5-V V_CC operation.

The 'LV164 feature AND-gated serial (A and B) inputs and anasynchronous clear ()input. The gated serial inputs permit complete control over incomingdata as a low at either input inhibits entry of the new data andresets the first flip-flop to the low level at the next clock pulse.A high-level input enables the other input, which then determines thestate of the first flip-flop. Data at the serial inputs can bechanged while the clock is high or low, provided the minimum setuptime requirements are met. Clocking occurs on the low-to-high-leveltransition of the clock (CLK) input.

The SN74LV164 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.

The SN54LV164 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74LV164is characterized for operation from -40°C to 85°C.

Title: 8-BIT PARALLEL-OUT SERIAL SHIFT REGISTERS
Product Family: SHIFT REGISTERS
Device Functionality: SHIFT REGISTERS
Orderable Devices: SN74LV164D, SN74LV164DR, SN74LV164PWLE

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View more information about generic part numbers:SN74LV164

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