



SCLS115B - DECEMBER 1982 - REVISED MAY 1997
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These 8-bit shift registers feature AND-gated serial inputs and an asynchronous clear (CLR\) input. The gated serial (A and B) inputs permit complete control over incoming data; a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock (CLK) pulse. A high-level input enables the other input, which then determines the state of the first flip-flop. Data at the serial inputs can be changed while CLK is high or low, provided the minimum setup time requirements are met. Clocking occurs on the low-to-high-level transition of CLK.
The SN54HC164 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74HC164 is characterized for operation from -40°C to 85°C
View more information about generic part numbers:SN54HC164, SN74HC164
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