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Data Sheet Abstract

SN74ALVCH162836 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

SCES122C - JULY 1997 - REVISED JANUARY 1998


features

description

This 20-bit universal bus driver is designed for 2.3-V to 3.6-V VCC operation.

Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when the latch-enable (LE\) input is low. When LE\ is high, the A data is latched if the clock (CLK) input is held at a high or low logic level. If LE\ is high, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The output port includes equivalent 26- series resistors to reduce overshoot and undershoot.

The SN74ALVCH162836 is characterized for operation from -40°C to 85°C


Title: 20-BIT UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS
Product Family: UNIVERSAL BUS DRIVERS (UBDS)
Device Functionality: 20-BIT BUS DRIVER
Orderable Devices: SN74ALVCH162836DGGR, SN74ALVCH162836DGVR, SN74ALVCH162836DL, SN74ALVCH162836DLR

View the complete PDF datasheet: sces122c.pdf (123 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74ALVCH162836

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