SCES094A - FEBRUARY 1997 - REVISED SEPTEMBER 1997
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The SN74ALVCHG162282 is an 18-bit to 36-bit registered bus exchanger. This device is intended for use in applications where data must be transferred from a narrow high-speed bus to a wide lower-frequency bus. It is designed specifically for low-voltage (3.3 V) VCC operation.
The device provides synchronous data exchange between the two ports. Data is stored in the internal registers on the low-to-high transition of the clock (CLK) input. For data transfer in the B-to-A direction, the select (SEL\) input selects 1B or 2B data for the A outputs.
For data transfer in the A-to-B direction, a two-stage pipeline is provided in the 1B path, with a single storage register in the 2B path. Data flow is controlled by the active-low output-enable (OE\) and direction-control (DIR) input. DIR is registered to synchronize the bus direction changes with the clock.
The A-port N-channel output transistors are sized at 450 um and the P-channel output transistors are sized at 700 um. All A-port outputs have equivalent 50- damping resistors. The B-port N-channel output transistors are sized at 225 um, and the P-channel output transistors are sized at 560 um. All B-port outputs have equivalent 20- damping resistors.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The switching characteristics are based on a 25-pF (A port) and 80-pF (B port) load, but are tested with the standard 50-pF load.
The SN74ALVCHG162282 is characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN74ALVCHG162282
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