SCES084D - AUGUST 1996 - REVISED JANUARY 1998
Series Resistors, So No External Resistors Are RequiredEPIC and Widebus are trademarks of Texas Instruments Incorporated.
This 1-bit to 4-bit address register/driver is designed for 2.3-V to 3.6-V VCC operation.
The device is ideal for use in applications in which a single address bus is driving four separate memory locations. The SN74ALVCH162831 can be used as a buffer or a register, depending on the logic level of the select (SEL\) input.
When SEL\ is logic high, the device is in the buffer mode. The outputs follow the inputs and are controlled by the two output-enable (OE\) controls. Each OE\ controls two groups of nine outputs.
When SEL\ is logic low, the device is in the register mode. The register is an edge-triggered D-type flip-flop. On the positive transition of the clock (CLK) input, data set up at the A inputs is stored in the internal registers. OE\ controls operate the same as in buffer mode.
When OE\ is logic low, the outputs are in a normal logic state (high or low logic level). When OE\ is logic high, the outputs are in the high-impedance state.
SEL\ and OE\ do not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The outputs, which are designed to sink up to 12 mA, include equivalent 26- resistors to reduce overshoot and undershoot.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVCH162831 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74ALVCH162831
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.