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Data Sheet Abstract

SN74ALVCH16721 3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS

SCES052C - JULY 1995 - REVISED OCTOBER 1997


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features

description

This 20-bit flip-flop is designed specifically for 2.3-V to 3.6-V VCC operation.

The 20 flip-flops of the SN74ALVCH16721 are edge-triggered D-type flip-flops with qualified clock storage. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs if the clock-enable (CLKEN\) input is low. If CLKEN\ is high, no data is stored.

A buffered output-enable (OE\) input places the 20 outputs in either a normal logic state (high or low) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. OE\ does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16721 is characterized for operation from -40°C to 85°C.


Title: 3.3-V 20-BIT FLIP-FLOP WITH 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: 20-BIT D-TYPE FLIP-FLOP
Orderable Devices: SN74ALVCH16721DGGR, SN74ALVCH16721DGVR, SN74ALVCH16721DL, SN74ALVCH16721DLR

View the complete PDF datasheet: sces052c.pdf (106 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74ALVCH16721

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