SN74ALVCHR162269 12-BIT TO 24-BIT REGISTERED BUS EXCHANGER WITH 3-STATE OUTPUTS

SCES050B - AUGUST 1995 - REVISED JANUARY 1997

features

• Member of the Texas Instruments Widebus^TM Family
• EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• All Outputs Have Equivalent 26- Series Resistors, So No External Resistors Are Required
• Bus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown Resistors
• Package Options Include Plastic Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages

  EPIC and Widebus are trademarks of Texas Instruments Incorporated.

description

This 12-bit to 24-bit registered bus exchanger is designed for 2.3-V to 3.6-V V_CC operation.

The SN74ALVCHR162269 is used in applications where two separate ports must be multiplexed onto, or demultiplexed from, a single port. It is particularly suitable as an interface between synchronous DRAMs and high-speed micro- processors.

Data is stored in the internal B-port registers on the low-to-high transition of the clock (CLK) input when the appropriate clock enable (CLKENA\)

inputs are low. Proper control of these inputs allows two sequential 12-bit words to be presented as a 24-bit word on the B port. For data transfer in the B-to-A direction, a single storage register is provided. The select (SEL\) line selects 1B or 2B data for the A outputs. The register on the A output permits the fastest possible data transfer, thus extending the period that the data is valid on the bus. The control terminals are registered so that all transactions are synchronous with CLK. Data flow is controlled by the active-low output enables (OEA\, OEB1\, and OEB2\).

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

All outputs are designed to sink up to12 mA and include 26- resistors to reduce overshoot and undershoot.

The SN74ALVCHR162269 is characterized for operation from -40°C to 85°C.

View more information about generic part numbers:SN74ALVCHR162269

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