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Data Sheet Abstract

SN74ALVCH16820 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS

SCES035D - JULY 1995 - REVISED JANUARY 1998


features

description

This 10-bit flip-flop is designed for 2.3-V to 3.6-V VCC operation.

The flip-flops of the SN74ALVCH16820 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.

A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

OE\ input does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74ALVCH16820 is characterized for operation from -40°C to 85°C.


Title: 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTS AND 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: 10-BIT D-TYPE FLIP-FLOP WITH DUAL OUTPUTS
Orderable Devices: SN74ALVCH16820DGGR, SN74ALVCH16820DL, SN74ALVCH16820DLR

View the complete PDF datasheet: sces035d.pdf (113 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74ALVCH16820

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