SN74LVCH245 OCTAL BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SCES008 - JULY 1995

features

• EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
• ESD Protection Exceeds 2000 V Per MIL-STD-833C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
• Supports Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltages With 3.3-VV_CC)
• Bus Hold on Data Inputs Eliminates the Need for External Pullup Resistors
• Package Options Include Shrink Small-Outline (DB), Plastic Small-Outline (DW), and Thin Shrink Small-Outline (PW) Packages

  EPIC is a trademark of Texas Instruments Incorporated.

description

This octal bus transceiver is designed for 2.7-V to 3.6-V V_CC operation; it can interface to a 5-V system environment.

The SN74LVCH245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. The output-enable (OE\) input can be used to disable the device so the buses are effectively isolated.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The SN74LVCH245 is characterized for operation from -40°C to 85°C.

View more information about generic part numbers:SN74LVCH245

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(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
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