SN74SSTL16837 20-BIT SSTL_3 INTERFACE UNIVERSAL BUS DRIVER WITH 3-STATE OUTPUTS

SCBS675E - SEPTEMBER 1996 - REVISED DECEMBER 1997

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features

• Member of the Texas Instruments Widebus^TM Family
• Supports SSTL_3 Signal Inputs and Outputs
• Flow-Through Architecture Optimizes PCB Layout
• Meets SSTL_3 Class I and Class II Specifications
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Packaged in Plastic Thin Shrink Small-Outline Package

  Widebus is a trademark of Texas Instruments Incorporated.

description

This 20-bit universal bus driver is designed for 3-V to 3.6-V V_CC operation and SSTL_3 or LVTTL I/O levels.

Data flow from A to Y is controlled by the output-enable (OE\) input. The device operates in the transparent mode when latch enable (LE) is high. The A data is latched if LE is low and clock (CLK) is held at a high or low logic level. If LE is low, the A data is stored in the latch/flip-flop on the low-to-high transition of CLK. When OE\ is high, the outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74SSTL16837 is characterized for operation from 0°C to 70°C

View more information about generic part numbers:SN74SSTL16837

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(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
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