



SCBS674D - AUGUST 1996 - REVISED JULY 1997
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Widebus is a trademark of Texas Instruments Incorporated.
These 18-bit registered bus transceivers contain two sets of D-type flip-flops for temporary storage of data flowing in either direction.
The B port operates at GTL (VTT = 1.2 V and VREF = 0.8 V) and GTL+ (VTT = 1.5 V and VREF = 1 V) levels, while the A port and control pins are compatible with LVTTL and 5-V TTL logic levels. VREF is the reference input voltage for the B port.
Data flow in each direction is controlled by the output-enable (OEAB\ and OEBA\) and the clock (CLKAB and CLKBA) inputs. The clock-enable (CEAB\ and CEBA\) inputs are used to enable or disable the clock for all 18 bits at a time. However, OEAB\ and OEBA\ are designed to control each 9-bit transceiver independently, which makes the device more versatile.
For A-to-B data flow, the device operates on the low-to-high transition of CLKAB if CEAB\ is low. When OEAB\ is low, the outputs are active. When OEAB\ is high, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA\, CLKBA, and CEBA\.
Active bus-hold circuitry is provided to hold unused or floating TTL inputs at a valid logic state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices in a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54GTL16923 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74GTL16923 is characterized for operation from -40°C to 85°C
View more information about generic part numbers:SN74GTL16923
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



