SN54ABT162823, SN74ABT162823 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

SCBS473B - JUNE 1994 - REVISED JANUARY 1997

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features

Output Ports Have Equivalent 25- Series Resistors So No External Resistors Are Required
Members of the Texas Instruments Widebus^TM Family
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
Package Options Include Plastic 300-mil Shrink Small-Outline (DL) Package and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus and EPIC-IIB are trademarks of Texas Instruments Incorporated.

description

These 18-bit bus-interface flip-flops feature 3-state outputsdesigned specifically for driving highly capacitive or relativelylow-impedance loads. They are particularly suitable for implementingwider buffer registers, I/O ports, bidirectional bus drivers withparity, and working registers.

The 'ABT162823 can be used as two 9-bit flip-flops or one 18-bitflip-flop. With the clock-enable () input low, the D-type flip-flops enter data on thelow-to-high transitions of the clock. Taking high disables the clock buffer,thus latching the outputs. Taking the clear () input low causes the Q outputs togo low independently of the clock.

A buffered output-enable () input places the nine outputs in either a normal logicstate (high or low logic level) or a high-impedance state. In thehigh-impedance state, the outputs neither load nor drive the buslines significantly. The high-impedance state and increased driveprovide the capability to drive bus lines without interface or pullupcomponents. does notaffect the internal operation of the flip-flops. Old data can beretained or new data can be entered while the outputs are in thehigh-impedance state.

The outputs, which are designed to source or sink up to 12 mA,include equivalent 25-series resistors to reduce overshoot and undershoot.

To ensure the high-impedance state during power up or power down, should be tiedto V_CC through a pullup resistor; the minimum value of theresistor is determined by the current-sinking capability of thedriver.

The SN54ABT162823 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ABT162823 is characterized for operation from -40°C to85°C.

Title: 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: BUS INTERFACE FLIP-FLOP
Orderable Devices: SN74ABT162823DGGR, SN74ABT162823DL, SN74ABT162823DLR

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View more information about generic part numbers:SN74ABT162823

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