SN54ABT16823, SN74ABT16823 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS

SCBS217C - JUNE 1992 - REVISED JANUARY 1997

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features

Members of the Texas Instruments Widebus^TM Family
State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
High-Impedance State During Power Up and Power Down
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
Flow-Through Architecture Optimizes PCB Layout
High-Drive Outputs (-32-mA I_OH, 64-mA I_OL)
Package Options Include Plastic 300-mil Shrink Small-Outline (DL), Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

Widebus and EPIC-IIB are trademarks of Texas Instruments

description

These 18-bit flip-flops feature 3-state outputs designedspecifically for driving highly capacitive or relativelylow-impedance loads. They are particularly suitable for implementingwider buffer registers, I/O ports, bidirectional bus drivers withparity, and working registers.

The 'ABT16823 can be used as two 9-bit flip-flops or one 18-bitflip-flop. With the clock-enable () input low, the D-type flip-flops enter data on thelow-to-high transitions of the clock. Taking high disables the clock buffer,latching the outputs. Taking the clear () input low causes the Q outputs togo low independently of the clock.

A buffered output-enable () input can be used to place the nine outputs in eithera normal logic state (high or low logic level) or a high-impedancestate. In the high-impedance state, the outputs neither load nordrive the bus lines significantly. The high-impedance state andincreased drive provide the capability to drive bus lines withoutneed for interface or pullup components.

does not affectthe internal operation of the flip-flops. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.

When V_CC is between 0 and 2.1 V, the device is in thehigh-impedance state during power up or power down. However, toensure the high-impedance state above 2.1 V, should be tied to V_CCthrough a pullup resistor; the minimum value of the resistor isdetermined by the current-sinking/current-sourcing capability of thedriver.

The SN54ABT16823 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ABT16823 is characterized for operation from -40°C to85°C.

Title: 18-BIT BUS-INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) FLIP-FLOPS
Device Functionality: 18-BIT BUS INTERFACE FLIP-FLOP
Orderable Devices: SNJ54ABT16823WD, SN74ABT16823DGGR, SN74ABT16823DL, SN74ABT16823DLR

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View more information about generic part numbers:SN54ABT16823, SN74ABT16823

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