SN54ABT2952, SN74ABT2952 OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

SCBS202 - NOVEMBER 1990 - REVISED OCTOBER 1992

features

• State-of-the-Art EPIC-IIB ^TM BiCMOS Design Significantly Reduces Power Dissipation
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Two 8-Bit Back-to-Back Registers Store Data Flowing in Both Directions
• Noninverting Outputs
• Typical V_OLP (Output Ground Bounce) < 1 V at V_CC = 5 V, T_A = 25°C
• Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

  EPIC-IIB is a trademark of Texas Instruments Incorporated.

description

The ´ABT2952 consists of two 8-bit back-to-back registersthat store data flowing in both directions between two bidirectionalbuses. Data on the A or B bus is stored in the registers on thelow-to-high transition of the clock (CLKAB or CLKBA) input providedthat the clock-enable (or) input is low.Taking the output-enable ( or) input lowaccesses the data on either port.

To ensure the high-impedance state during power up or power down, should be tiedto V_CC through a pullup resistor; the minimum value of theresistor is determined by the current-sinking capability of thedriver.

The SN74ABT2952 is available in TI's shrink small-outline package(DB), which provides the same I/O pin count and functionality ofstandard small-outline packages in less than half theprinted-circuit-board area.

The SN54ABT2952 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ABT2952 is characterized for operation from -40°C to85°C.

View more information about generic part numbers:SN54ABT2952

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.

(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
Trademarks, Important Notice!