SCBS175F - NOVEMBER 1991 - REVISED JUNE 1997
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The 'FB2032 are 9-bit transceivers designed to translate signals between TTL and backplane transceiver logic (BTL) environments and to perform bus arbitration. They are specifically designed to be compatible with IEEE Std 1194.1-1991.
The B\ port operates at BTL-signal levels. The open-collector B\ ports are specified to sink 100 mA and have minimum output edge rates of 2 ns. Two output enables, OEB and OEB\, are provided for the B\ outputs. When OEB is low, OEB\ is high, or VCC is less than 2.1 V, the B\ port is turned off.
The A port operates at TTL-signal levels. The A outputs reflect the inverse of the data at the B\ port when the A-port output enable, OEA, is high. When OEA is low or when VCC is less than 2.1 V, the A outputs are in the high-impedance state.
The A-port data is latched when the latch enable (LE) is high. When LE is low, the latches are transparent.
The Futurebus protocol logic can be activated by taking COMPETE\ low. The module (device) then compares its A data (arbitration number) against the A data of another identical module also connected to the B\ arbitration bus, and sets WIN high if the A data is greater than the A data of the other module (i.e., has higher priority). A8 and B8\ are the most-significant bits, and A1 and B1\ are the least-significant bits. If OEB is high and OEB\ is low during this operation, and the A bus of the first module wins priority, the A bus asserts its arbitration number on the B\-arbitration bus.
AP and BP\ are the bus-parity bits. The winning module can assert BP\ low if its parity bit (AP) is high.
In a typical operating sequence, a Futurebus arbitration controller latches its arbitration number into the A port and waits for the results of a competition. When the competition is complete, and if the controller's arbitration number did not win, the controller reads back the current value of the B\ bus (by taking OEA high) and determines the winning arbitration number. This allows the module to change its arbitration number for the next competition cycle, if desired.
Pins are allocated for the four-wire IEEE Std 1149.1 (JTAG) test bus, which will be implemented in a future version of the 'FB2032. Currently, TMS and TCK are not connected and TDI is shorted to TDO.
BIAS VCC establishes a voltage between 1.62 V and 2.1 V on the BTL outputs when VCC is not connected.
BG VCC and BG GND are the supply inputs for the bias generator.
The SN54FB2032 is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74FB2032 is characterized for operation from 0°C to 70°C.
View more information about generic part numbers:SN74FB2032
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