SN54LVT16646, SN74LVT16646 3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

SCBS149C - JULY 1994 - REVISED JULY 1995

features

• State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation
• Members of the Texas Instruments Widebus^TM Family
• Support Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V V_CC)
• Support Unregulated Battery Operation Down to 2.7 V
• Typical V_OLP (Output Ground Bounce)< 0.8 V at V_CC = 3.3 V, T_A = 25°C
• ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17
• Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors
• Support Live Insertion
• Distributed V_CC and GND Pin Configuration Minimizes High-Speed Switching Noise
• Flow-Through Architecture Optimizes PCB Layout
• Package Options Include Plastic 300-mil Shrink Small-Outline (DL) and Thin Shrink Small-Outline (DGG) Packages and 380-mil Fine-Pitch Ceramic Flat (WD) Package Using 25-mil Center-to-Center Spacings

  Widebus is a trademark of Texas Instruments Incorporated.

   

description

The 'LVT16646 are 16-bit bus transceivers designed for low-voltage(3.3-V) V_CC operation, but with the capability to providea TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bittransceiver. Data on the A or B bus is clocked into the registers onthe low-to-high transition of the appropriate clock (CLKAB or CLKBA)input. Figure 1 illustrates the four fundamental bus-managementfunctions that can be performed with the ´LVT16646.

Output-enable anddirection-control (DIR) inputs are provided to control thetransceiver functions. In the transceiver mode, data present at thehigh-impedance port may be stored in either register or in both. Theselect-control (SAB and SBA) inputs can multiplex stored andreal-time (transparent mode) data. The circuitry used for selectcontrol eliminates the typical decoding glitch that occurs in amultiplexer during the transition between stored and real-time data.The direction control (DIR) determines which bus receives data when is low. In theisolation mode (high), A datamay be stored in one register and/or B data may be stored in theother register.

When an output function is disabled, the input function is stillenabled and may be used to store and transmit data. Only one of thetwo buses, A or B, may be driven at a time.

Active bus-hold circuitry is provided to hold unused or floatingdata inputs at a valid logic level.

To ensure the high-impedance state during power up or power down, should be tiedto V_CC through a pullup resistor; the minimum value of theresistor is determined by the current-sinking capability of thedriver.

The SN74LVT16646 is available in TI's shrink small-outline (DL)and thin shrink small-outline (DGG) packages, which provide twice theI/O pin count and functionality of standard small-outline packages inthe same printed-circuit-board area.

The SN54LVT16646 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74LVT16646 is characterized for operation from -40°C to85°C.

View more information about generic part numbers:SN74LVT16646

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