SN54ABT18646, SN74ABT18646 SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

SCBS131-AUGUST 1992-REVISED OCTOBER 1992

features

• Members of the Texas Instruments SCOPE ^TM Family of Testability Products
• Members of the Texas Instruments Widebus ^TM Family
• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
• Include D-Type Flip-Flops and Control Circuitry to Provide Multiplexed Transmission of Stored and Real-Time Data
• Two Boundary-Scan Cells per I/O for Greater Flexibility
• State-of-the-Art EPIC-IIB ^TM BiCMOS Design Significantly Reduces Power Dissipation
• SCOPE ^TM Instruction Set
  • IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, and P1149.1A CLAMP and HIGHZ
  • Parallel Signature Analysis at Inputs With Masking Option
  • Pseudo-Random Pattern Generation From Outputs
  • Sample Inputs/Toggle Outputs
  • Binary Count From Outputs
  • Device Identification
  • Even-Parity Opcodes
• Packaged in 64-Pin Plastic Shrink Quad Flat Pack (PM) and 68-Pin Ceramic Quad Flat Pack (HV)

  SCOPE, Widebus, and EPIC-IIB are trademarks of Texas Instruments Incorporated.

   

description

The SN54ABT18646 and SN74ABT18646 scan test devices with 18-bitbus transceivers and registers are members of the Texas InstrumentsSCOPE^TM testability IC family. This family of devicessupports IEEE Standard 1149.1-1990 boundary scan to facilitatetesting of complex circuit board assemblies. Scan access to the testcircuitry is accomplished via the 4-wire test access port (TAP)interface.

In the normal mode, these devices are 18-bit bus transceivers andregisters that allow for multiplexed transmission of data directlyfrom the input bus or from the internal registers. They can be usedeither as two 9-bit transceivers or one 18-bit transceiver. The testcircuitry can be activated by the TAP to take snapshot samples of thedata appearing at the device pins or to perform a self test on theboundary test cells. Activating the TAP in the normal mode does notaffect the functional operation of the SCOPE^TM bustransceivers and registers.

Transceiver function is controlled by output-enable () and direction (DIR) inputs. When is low, thetransceiver is active and operates in the A-to-B direction when DIRis high or in the B-to-A direction when DIR is low. When is high, both the A and B outputsare in the high-impedance state, effectively isolating both buses.

Data flow is controlled by clock (CLKAB and CLKBA) and select (SABand SBA) inputs. Data on the A bus is clocked into the associatedregisters on the low-to-high transition of CLKAB. When SAB is low,real-time A data is selected for presentation to the B bus(transparent mode). When SAB is high, stored A data is selected forpresentation to the B bus (registered mode). The function of theCLKBA and SBA inputs mirrors that of CLKAB and SAB, respectively.Figure 1 illustrates the four fundamental bus-management functionsthat can be performed with the ´ABT18646.

In the test mode, the normal operation of the SCOPE^TMbus transceivers and registers is inhibited, and the test circuitryis enabled to observe and control the I/O boundary of the device.When enabled, the test circuitry can perform boundary scan testoperations according to the protocol described in IEEE Standard1149.1-1990.

Four dedicated test pins are used to observe and control theoperation of the test circuitry: test data input (TDI), test dataoutput (TDO), test mode select (TMS), and test clock (TCK).Additionally, the test circuitry can perform other testing functionssuch as parallel signature analysis on data inputs and pseudo-randompattern generation from data outputs. All testing and scan operationsare synchronized to the TAP interface.

Additional flexibility is provided in the test mode through theuse of two boundary scan cells (BSCs) for each I/O pin. This allowsindependent test data to be captured and forced at either bus (A orB). A PSA/COUNT instruction is also included to ease the testing ofmemories and other circuits where a binary count addressing scheme isuseful.

The SN54ABT18646 is characterized over the full militarytemperature range of -55°C to 125°C. The SN74ABT18646 ischaracterized for operation from -40°C to 85°C.

View more information about generic part numbers:SN74ABT18646

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.

(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
Trademarks, Important Notice!