SN54ABT8646, SN74ABT8646 SCAN TEST DEVICES WITH OCTAL BUS TRANSCEIVERS AND REGISTERS

SCBS123E - AUGUST 1992 - REVISED JULY 1996

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features

• Members of the Texas Instruments SCOPE^TM Family of Testability Products
• Compatible With the IEEE Standard 1149.1-1990 (JTAG) Test Access Port and Boundary-Scan Architecture
• Functionally Equivalent to 'F646 and 'ABT646 in the Normal-Function Mode
• SCOPE^TM Instruction Set
  • IEEE Standard 1149.1-1990 Required Instructions, Optional INTEST, CLAMP, and HIGHZ
  • Parallel-Signature Analysis at Inputs With Masking Option
  • Pseudo-Random Pattern Generation From Outputs
  • Sample Inputs/Toggle Outputs
  • Binary Count From Outputs
  • Even-Parity Opcodes
• Two Boundary-Scan Cells Per I/O for Greater Flexibility
• State-of-the-Art EPIC-IIB^TM BiCMOS Design Significantly Reduces Power Dissipation
• Package Options Include Plastic Small-Outline (DW) and Shrink Small-Outline (DL) Packages, Ceramic Chip Carriers (FK), and Standard Ceramic DIPs (JT)

SCOPE and EPIC-IIB are trademarks of Texas InstrumentsIncorporated.

description

The 'ABT8646 and scan test devices with octal bus transceivers andregisters are members of the Texas Instruments SCOPE^TMtestability integrated-circuit family. This family of devicessupports IEEE Standard 1149.1-1990 boundary scan to facilitatetesting of complex circuit-board assemblies. Scan access to the testcircuitry is accomplished via the 4-wire test access port (TAP)interface.

In the normal mode, these devices are functionally equivalent tothe 'F646 and 'ABT646 octal bus transceivers and registers. The testcircuitry can be activated by the TAP to take snapshot samples of thedata appearing at the device pins or to perform a self test on theboundary-test cells. Activating the TAP in normal mode does notaffect the functional operation of the SCOPE^TM octal bustransceivers and registers.

Transceiver function is controlled by output-enable () and direction (DIR) inputs. When is low, thetransceiver is active and operates in the A-to-B direction when DIRis high or in the B-to-A direction when DIR is low. When is high, both the A and B outputsare in the high-impedance state, effectively isolating both buses.

Data flow is controlled by clock (CLKAB and CLKBA) and select (SABand SBA) inputs. Data on the A bus is clocked into the associatedregisters on the low-to-high transition of CLKAB. When SAB is low,real-time A data is selected for presentation to the B bus(transparent mode). When SAB is high, stored A data is selected forpresentation to the B bus (registered mode). The function of theCLKBA and SBA inputs mirrors that of CLKAB and SAB, respectively.Figure 1 shows the four fundamental bus-management functions that canbe performed with the 'ABT8646.

In the test mode, the normal operation of the SCOPE^TMbus transceivers and registers is inhibited and the test circuitry isenabled to observe and control the I/O boundary of the device. Whenenabled, the test circuitry performs boundary-scan test operations asdescribed in IEEE Standard 1149.1-1990.

Four dedicated test pins control the operation of the testcircuitry: test data input (TDI), test data output (TDO), test modeselect (TMS), and test clock (TCK). Additionally, the test circuitryperforms other testing functions such as parallel-signature analysis(PSA) on data inputs and pseudo-random pattern generation (PRPG) fromdata outputs. All testing and scan operations are synchronized to theTAP interface.

The SN54ABT8646 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ABT8646 is characterized for operation from -40°C to85°C.

Figure 1. Bus-Management Functions

View more information about generic part numbers:SN54ABT8646, SN74ABT8646

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