SCBS065A - JUNE 1990 - REVISED JANUARY 1994
This 8-bit latch features 3-state outputs designed specificallyfor driving highly capacitive or relatively low-impedance loads. Itis particularly suitable for implementing buffer registers, I/Oports, bidirectional bus drivers, and working registers.
The eight latches of the SN64BCT373 are transparent D-typelatches. While the latch-enable (LE) input is high, the Q outputsfollow the data (D) inputs. When the enable is taken low, the Qoutputs are latched at the levels that were set up at the D inputs.
A buffered output-enable (
) input can be used to place the eight outputs in eithera normal logic state (high or low logic levels) or a high-impedancestate. In the high-impedance state the outputs neither load nor drivethe bus lines significantly. The high-impedance impedance state andincreased drive provide the capability to drive bus lines withoutneed for interface or pullup components.
The output-enable ()does not affect the internal operations of the latches. Old data canbe retained or new data can be entered while the outputs are off.
The outputs are in a high-impedance state during power up andpower down while the supply voltage is less than approximately 3 V.
The SN64BCT373 is characterized for operation from -40°C to85°C and 0°C to 70°C.
View more information about generic part numbers:SN64BCT373
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