SN74BCT651 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

SCBS054A - AUGUST 1990 - REVISED NOVEMBER 1993

features

• State-of-the-Art BiCMOS Design Significantly Reduces I_CCZ
• Independent Registers for A and B Buses
• Multiplexed Real-Time and Stored Data
• Inverting Data Paths
• Power-Up High-Impedance Mode
• Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic 300-mil DIPs (NT)

description

This SN74BCT651 consists of bus transceiver circuits, D-typeflip-flops, and control circuitry arranged for multiplexedtransmission of data directly from the data bus or from the internalstorage registers. Output-enable (OEAB and ) inputs are provided to controlthe transceiver functions. The select-control (SAB and SBA) inputsare provided to select whether real-time or stored data istransferred. A low input level selects real-time data, and a highinput level selects stored data. Figure 1 illustrates the fourfundamental bus-management functions that can be performed with theSN74BCT651.

Data on the A or B bus, or both, can be stored in the internal Dflip-flops by low-to-high transitions at the appropriate clock (CLKABor CLKBA) inputs regardless of the select- or enable-control pins.When SAB and SBA are in the real-time transfer mode, it is alsopossible to store data without using the internal D-type flip-flopsby simultaneously enabling OEAB and . In this configuration, each output reinforces itsinput. Thus, when all the other data sources to the two sets of buslines are at high impedance, each set will remain at its last state.

The SN74BCT651 is characterized for operation from 0°C to70°C.

View more information about generic part numbers:SN74BCT651

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