SCAS542B - OCTOBER 1995 - REVISED NOVEMBER 1996
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These 8-bit latches feature 3-state outputs designed specificallyfor driving highly capacitive or relatively low-impedance loads. Thedevices are particularly suitable for implementing buffer registers,I/O ports, bidirectional bus drivers, and working registers.
The eight latches are D-type transparent latches. When thelatch-enable (LE) input is high, the Q outputs follow the data (D)inputs. When LE is taken low, the Q outputs are latched at the logiclevels set up at the D Inputs.
A buffered output-enable (
) input can be used to place the eight outputs in eithera normal logic state (high or low logic levels) or the high-impedancestate. In the high-impedance state, the outputs neither load nordrive the bus lines significantly. The high-impedance state andincreased drive provide the capability to drive bus lines in abus-organized system without need for interface or pullup components.
does not affectthe internal operations of the latches. Old data can be retained ornew data can be entered while the outputs are in the high-impedancestate.
The SN54AC573 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. The SN74AC573is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74AC573
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