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SCAS521C - AUGUST 1995 - REVISED SEPTEMBER 1996
features
- EPICTM (Enhanced-Performance Implanted CMOS) 1-
m Process - Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Flat (W), and DIP (J,N) Packages
EPIC is a trademark of Texas Instrumentsdescription
The 'AC74 are dual positive-edge-triggered D-type flip-flops.
A low level at the preset (
) or clear (
)input sets or resets the outputs, regardless of the levels of theother inputs. When
and are inactive (high), data at thedata (D) input meeting the setup-time requirements is transferred tothe outputs on the positive-going edge of the clock pulse. Clocktriggering occurs at a voltage level and is not directly related tothe rise time of the clock pulse. Following the hold-time interval,data at D can be changed without affecting the levels at the outputs.
The SN54AC74 is characterized for operation over the full militarytemperature range of -55°C to 125°C. The SN74AC74 ischaracterized for operation from -40°C to 85°C.
Title: DUAL POSITIVE-EDGE-TRIGGERED D-TYPE- FLIP-FLOPS WITH CLEAR AND PRESET
Product Family: D-TYPE FLIP-FLOPS
Device Functionality: DUAL D-TYPE FLIP-FLOP
Orderable Devices: SNJ54AC74FK, SNJ54AC74J, SNJ54AC74W, SN74AC74D, SN74AC74DBLE, SN74AC74DR, SN74AC74N, SN74AC74PWLE
View the complete PDF datasheet: scas521c.pdf (104 K Bytes) (Requires Acrobat Reader 3.x)View more information about generic part numbers:SN54AC74, SN74AC74
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.




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