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Data Sheet Abstract

CDC339 CLOCK DRIVER WITH 3-STATE OUTPUTS

SCAS331 - DECEMBER 1992 - REVISED MARCH 1994


features

description

The CDC339 is a high-performance, low-skew clock driver. It isspecifically designed for applications requiring synchronized outputsignals at both the primary clock frequency and one-half the primaryclock frequency. The four Y outputs switch in phase and at the samefrequency as the clock (CLK) input. The four Q outputs switch atone-half the frequency of CLK.

When the output-enable ( )input is low and the clear ()input is high, the Y outputs follow CLK and the Q outputs toggle onlow-to-high transitions of CLK. Taking low asynchronously resets the Qoutputs to the low level. When is high, the outputs are in the high-impedance state.

The CDC339 is characterized for operation from -40°C to85°C.


Title: CLOCK DRIVER WITH 3-STATE OUTPUTS
Product Family: OTHER DIGITAL LOGIC
Device Functionality: CLOCK DRIVER
Orderable Devices: CDC339DBLE, CDC339DW, CDC339DWR

View the complete PDF datasheet: scas331.pdf (99 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:CDC339

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