CDC304 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER
SCAS325A - JULY 1990 - REVISED NOVEMBER 1995
features
- Replaces SN74AS304
- Maximum Output Skew of 1 ns
- Maximum Pulse Skew of 1.5 ns
- TTL-Compatible Inputs and Outputs
- Center-Pin VCC and GND Configurations Minimize High-Speed Switching Noise
- Package Options Include Plastic Small-Outline (D) Package and Standard Plastic (N) 300-mil DIPs
description
The CDC304 contains eight flip-flops designed to have low skewbetween outputs. The eight outputs (in-phase with CLK) toggle onsuccessive CLK pulses. Preset (
) and clear (
)inputs are provided to set the Q outputs high or low independent ofthe clock (CLK) input.
The CDC304 has output and pulse-skew parameters tsk(o)and tsk(p) to ensure performance as a clock driver when adivide-by-two function is required.
The CDC304 is characterized for operation from 0°C to70°C.
Title: OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER
Product Family: OTHER DIGITAL LOGIC
Device Functionality: CLOCK DRIVER
Orderable Devices: CDC304D, CDC304DR, CDC304N
View the complete PDF datasheet: scas325a.pdf (84 K Bytes) (Requires Acrobat Reader 3.x)View more information about generic part numbers:CDC304
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.
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