SN74LVC863 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS

SCAS310A - MARCH 1993 - REVISED JULY 1995

features

EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages
EPIC is a trademark of Texas Instruments Incorporated.

description

This 9-bit bus transceiver is designed for 2.7-V to 3.6-V V_CC operation.

The SN74LVC863 is designed for asynchronous communication between data buses. The control-function implementation allows for maximum flexibility in timing.

This device allows data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB\ and OEBA\) inputs.

The outputs are in the high-impedance state during power-up and power-down conditions. The outputs remain in the high-impedance state while the device is powered down.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LVC863 is characterized for operation from -40°C to 85°C.

Title: 9-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS
Product Family: UNIVERSAL BUS TRANSCEIVERS (UBTS)
Device Functionality: BUS TRANSCEIVERS
Orderable Devices: SN74LVC863DW, SN74LVC863PWLE

View the complete PDF datasheet: scas310a.pdf (82 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74LVC863

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