SCAS307A - MARCH 1993 - REVISED JULY 1995
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This 10-bit bus-interface D-type latch is designed for 2.7-V to 3.6-V VCC operation; it can interface to a 5-V system environment.
The SN74LVC841 is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type latches. The device has noninverting data (D) inputs and provides true data at its outputs.
A buffered output-enable (OE\) input can be used to place the ten outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
The output-enable (OE\) input does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVC841 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74LVC841
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