SCAS305A - MARCH 1993 - REVISED AUGUST 1995
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This 9-bit bus-interface flip-flop is designed for 2.7-V to 3.6-V VCC operation.
The SN74LVC823 is designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
With the clock-enable (CLKEN\) input low, the nine D-type edge-triggered flip-flops enter data on the low-to-high transitions of the clock. Taking CLKEN\ high disables the clock buffer, latching the outputs. The SN74LVC823 has noninverting data (D) inputs. Taking the clear (CLR\) input low causes the nine Q outputs to go low independently of the clock.
A buffered output-enable (OE\) input can be used to place the nine outputs in either a normal logic state (high or low logic levels) or a high-impedance state. The output-enable (OE\) input does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVC823 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74LVC823
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