SN54LVC373A, SN74LVC373A OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

SCAS295I - JANUARY 1993 - REVISED JANUARY 1998

features

EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
Power Off Disables Outputs, Permitting Live Insertion
Support Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V V_CC)
ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JESD 17
Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), Ceramic Flat (W) Packages, and Ceramic (J) Dips

EPIC is a trademark of Texas Instruments Incorporated.

description

These octal transparent D-type latches are designed for 2.7-V to 3.6-V V_CC operation.

While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q outputs are latched at the logic levels set up at the D inputs.

A buffered output-enable (OE\) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

OE\ does not affect the internal operations of the latches. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN54LVC373A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVC373A is characterized for operation from -40°C to 85°C.

Title: OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
Product Family: D-TYPE (3-STATE) LATCHES
Device Functionality: OCTAL D-TYPE LATCH
Orderable Devices: SN74LVC373ADBLE, SN74LVC373ADW, SN74LVC373ADWR, SN74LVC373APWLE

View the complete PDF datasheet: scas295i.pdf (90 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74LVC373A

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