SN74LVC125 QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS

SCAS290B - JANUARY 1993 - REVISED JULY 1995

features

EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
Inputs Accept Voltages to 5.5 V
Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages
EPIC is a trademark of Texas Instruments Incorporated.

description

This quadruple bus buffer gate is designed for 2.7-V to 3.6-V V_CC operation. The SN74LVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE\) input is high.

To ensure the high-impedance state during power up or power down, OE\ should be tied to V_CC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

The SN74LVC125 is characterized for operation from -40°C to 85°C.

Title: QUADRUPLE BUS BUFFER GATE WITH 3-STATE OUTPUTS
Product Family: INVERTERS
Device Functionality: BUFFER/DRIVER
Orderable Devices: SN74LVC125D, SN74LVC125DBLE, SN74LVC125DR, SN74LVC125PWLE

View the complete PDF datasheet: scas290b.pdf (77 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74LVC125

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