SN74LVC10 TRIPLE 3-INPUT POSITIVE-NAND GATE

SCAS284B - JANUARY 1993 - REVISED JULY 1995

features

EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per JEDEC Standard JESD-17
Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
Inputs Accept Voltages to 5.5 V
Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages
EPIC is a trademark of Texas Instruments Incorporated.

description

This triple 3-input positive-NAND gate is designed for 2.7-V to 3.6-V V_CC operation. The SN74LVC10 performs the Boolean functions Y = A \•\ B \•\ C\ or Y = A\ + B\ + C\ in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

The SN74LVC10 is characterized for operation from -40°C to 85°C.

Title: TRIPLE 3-INPUT POSITIVE-NAND GATE
Product Family: NAND
Device Functionality: POSITIVE-NAND
Orderable Devices: SN74LVC10D, SN74LVC10DBLE, SN74LVC10DR, SN74LVC10PWLE

View the complete PDF datasheet: scas284b.pdf (75 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74LVC10

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.