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SCAS283F - JANUARY 1993 - REVISED JANUARY 1998
features
- EPICTM (Enhanced-Performance Implanted CMOS) Submicron Process
- ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
- Latch-Up Performance Exceeds 250 mA Per JESD 17
- Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C
- Typical VOHV (Output VOH Undershoot) > 2 V at VCC = 3.3 V, TA = 25°C
- Inputs Accept Voltages to 5.5 V
- Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flat (W) Packages, and DIPs (J)
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description
These quadruple 2-input positive-AND gates are designed for 2.7-V to 3.6-V VCC operation.
The 'LVC08A devices perform the Boolean function in positive logic.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-/5-V system environment.
The SN54LVC08A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVC08A is characterized for operation from -40°C to 85°C.
Title: QUADRUPLE 2-INPUT POSITIVE-AND GATES
Product Family: AND
Device Functionality: 2-INPUT POSITIVE-AND
Orderable Devices: SN74LVC08AD, SN74LVC08ADBLE, SN74LVC08ADR, SN74LVC08APWLE
View the complete PDF datasheet: scas283f.pdf (78 K Bytes) (Requires Acrobat Reader 3.x)View more information about generic part numbers:SN74LVC08A
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.




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