SN54LVC02A, SN74LVC02A QUADRUPLE 2-INPUT POSITIVE-NOR GATES

SCAS280G - JANUARY 1993 - REVISED APRIL 1998

features

• EPIC^TM (Enhanced-Performance Implanted CMOS) Submicron Process
• Typical V_OLP (Output Ground Bounce) < 0.8 V at V_CC = 3.3 V, T_A = 25°C
• Typical V_OHV (Output V_OH Undershoot) > 2 V at V_CC = 3.3 V, T_A = 25°C
• Inputs Accept Voltages to 5.5 V
• ESD Protection Exceeds 2000 V Per MIL-STD-883, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
• Latch-Up Performance Exceeds 250 mA Per JESD 17
• Package Options Include Plastic Small-Outline (D), Shrink Small-Outline (DB), Thin Shrink Small-Outline (PW) Packages, Ceramic Flat (W), Chip Carriers (FK), and Ceramic 300-mil DIPs (J)

EPIC is a trademark of Texas Instruments Incorporated.

description

These quadruple 2-input positive-NOR gates are designed for 2.7-V to 3.6-V V_CC operation.

The 'LVC02A devices perform the Boolean function Y = A + B\ or Y = A\ • B\ in positive logic.

Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment.

The SN54LVC02A is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74LVC02A is characterized for operation from -40°C to 85°C.

View more information about generic part numbers:SN74LVC02A

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(c) Copyright 1998 Texas Instruments Incorporated. All rights reserved.
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