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Data Sheet Abstract

SN74ALVC162820 3.3-V 10-BIT FLIP-FLOP WITH DUAL OUTPUTSAND SERIES-DAMPING RESISTORSAND 3-STATE OUTPUTS

SCAS278 - OCTOBER 1993 - REVISED MARCH 1994


features

description

This 10-bit flip-flop is designed specifically for low-voltage(3.3-V) VCC operation

The flip-flops of the SN74ALVC162820 are edge-triggered D-typeflip-flops. On the positive transition of the clock (CLK) input, thedevice provides true data at the Q outputs.

A buffered output-enable () input can be used to place the eight outputs in eithera normal logic state (high or low logic levels) or a high-impedancestate. In the high-impedance state, the outputs neither load nordrive the bus lines significantly. The high-impedance state andincreased drive provide the capability to drive bus lines withoutneed for interface or pullup components.

The output-enable ()input does not affect the internal operations of the flip-flops. Olddata can be retained or new data can be entered while the outputs arein the high-impedance state.

The outputs, which are designed to sink up to 12 mA, include 26-resistors to reduce overshoot andundershoot.

Active bus-hold circuitry is provided to hold unused or floatingdata inputs at a valid logic level.

The SN74ALVC162820 is available in TI's shrink small-outline (DL)and thin shrink small-outline (DGG) packages, which provide twice theI/O pin count and functionality of standard small-outline packages inthe same printed-circuit-board area.

The SN74ALVC162820 is characterized for operation from -40°Cto 85°C.


Title: 3.3-V !0-BIT FLIP-FLOP W/DUAL OP,SERIES-DMPG RESISTORS,3-STATE OUTPUTS
Product Family: INVERTERS
Device Functionality: MOS MEMORY DRIVER
Orderable Devices: SN74ALVC162820DL, SN74ALVC162820DLR

View the complete PDF datasheet: scas278.pdf (58 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74ALVC162820

Go to the Engineering Design Center to locate information on other TI Semiconductor devices.

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