



SCAS259A - NOVEMBER 1993 - REVISED JULY 1995
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The SN74ALVC16409 allows synchronous data exchange between four different buses.
Data flow is controlled by the select (SEL0-SEL4) inputs. A data-flow state is stored on the rising edge of the clock (CLK) input if the select-enable (SELEN\) input is low. Once a data-flow state has been established, data is stored in the flip-flop on the rising edge of CLK if SELEN\ is high.
The data-flow control logic is designed to allow glitch-free data transmission.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVC16409 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN74ALVC16409 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74ALVC16409
Go to the Engineering Design Center to locate information on other TI Semiconductor devices.



