SCAS252A - OCTOBER 1993 - REVISED JULY 1995
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The SN74ALVC16260 is a 12-bit to 24-bit multiplexed D-type latch used in applications where two separate data paths must be multiplexed onto, or demultiplexed from, a single data path. Typical applications include multiplexing and/or demultiplexing address and data information in microprocessor or bus- interface applications. This device is also useful in memory-interleaving applications.
Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are available for address and/or data transfer. The output-enable (OE1B\, OE2B\, and OEA\) inputs control the bus transceiver functions. The OE1B\ and OE2B\ control signals also allow bank control in the A-to-B direction.
Address and/or data information can be stored using the internal storage latches. The latch-enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control data storage. When the latch-enable input is high, the latch is transparent. When the latch-enable input goes low, the data present at the inputs is latched and remains latched until the latch-enable input is returned high.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
The SN74ALVC16260 is available in TI's shrink small-outline (DL) and thin shrink small-outline (DGG) packages, which provide twice the I/O pin count and functionality of standard small-outline packages in the same printed-circuit-board area.
The SN74ALVC16260 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:SN74ALVC16260
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