SCAS213A - MAY 1987 - REVISED APRIL 1996
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m Process
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This 8-bit latch features 3-state outputs designed specificallyfor driving highly-capacitive or relatively low-impedance loads. Itis particularly suitable for implementing buffer registers, I/Oports, bidirectional bus drivers, and working registers.
The eight latches of the 74AC11373 are transparent D-type latches.While the latch-enable (LE) input is high, the Q outputs follow thedata (D) inputs. When LE is taken low, the Q outputs are latched atthe levels set up at the D inputs.
can be used toplace the eight outputs in either a normal logic state (high or lowlogic levels) or a high-impedance state. In the high-impedance state,the outputs neither load nor drive the bus lines significantly. Thehigh-impedance third state and increased drive provide the capabilityto drive bus lines in a bus-organized system without need forinterface or pullup components.
does not affectthe internal operations of the latches. Old data can be retained ornew data can be entered while the outputs are off.
The 74AC11373 is characterized for operation from -40°C to85°C.
View more information about generic part numbers:74AC11373
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