SN74ACT1071 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION

SCAS192 - D3994, MARCH 1992 - REVISED APRIL 1993

features

Designed to Ensure Defined Voltage Levels on Floating Bus Lines in CMOS Systems
Reduces Undershoot and Overshoot Caused By Line Reflections
Repetitive Peak Forward Current . . . I_FRM = 100 mA
Inputs Are TTL-Voltage Compatible
Low Power Consumption (Like CMOS)
ESD Protection Exceeds 2000 V Per MIL-STD-883C, Method 3015; Exceeds 200 V Using Machine Model (C = 200 pF, R = 0)
Center-Pin V_CC and GND Configuration Minimizes High-Speed Switching Noise

description

This device is designed to terminate bus lines in CMOS systems.The integrated low-impedance diodes clamp the voltage of undershootsand overshoots caused by line reflections and ensure signalintegrity. The device also contains a bus-hold function that consistsof a CMOS-buffer stage with a high-resistance feedback path betweenits output and its input. The SN74ACT1071 prevents bus lines fromfloating without using pullup or pulldown resistors.

The high-impedance inputs of these internal buffers are connectedto the input terminals of the device. The feedback path on eachinternal buffer stage keeps a bus line tied to the bus holder at thelast valid logic state generated by an active driver before the busswitches to the high-impedance state.

The SN74ACT1071 is characterized for operation from -40°C to85°C.

Title: 10-BIT BUS-TERMINATION ARRAY WITH BUS-HOLD FUNCTION
Product Family: STANDARD BUS SWITCHES
Device Functionality: 10-BIT BUS TERMINATION NETWORK
Orderable Devices: SN74ACT1071D, SN74ACT1071DR

View the complete PDF datasheet: scas192.pdf (54 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:SN74ACT1071

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