74ACT11378 HEX D-TYPE FLIP-FLOP WITH CLOCK ENABLE

SCAS185A - AUGUST 1990 - REVISED APRIL 1993

features

• Inputs Are TTL-Voltage Compatible
• Contains Six D-Type Flip-Flops
• Clock Enable Latched to Avoid False Clocking
• Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators
• Flow-Through Architecture Optimizes PCB Layout
• Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
• EPIC ^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Small-Outline Packages, and Standard Plastic 300-mil DIPs

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description

These circuits are positive-edge-triggered D-type flip-flops witha clock-enable input. Information at the D inputs meeting the setuptime requirements is transferred to the Q outputs on thepositive-going edge of the clock pulse if the clock-enable input() islow.

Clock triggering occurs at a particular voltage level and is notdirectly related to the transition time of the positive-going pulse.When the clock inputs are at either the high or low level, the data(D) input signal has no effect at the output. The circuits aredesigned to prevent false clocking by transitions at the clock-enable()input.

The 74ACT11378 is characterized for operation from - 40°C to85°C.

View more information about generic part numbers:74ACT11378

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