SCAS182 - APRIL 1989 - REVISED APRIL 1993
m Process EPIC is a trademark of Texas Instruments Incorporated.
The 74AC11478 is an 8-bit dual-rank synchronizer circuit designedspecifically for data synchronization applications in which thenormal setup and hold time specifications are frequently violated.
Synchronization of two digital signals operating at differentfrequencies is a common system problem. This problem is typicallysolved by synchronizing one of the signals to the local clock througha flip-flop. This solution, however, causes the setup and hold timespecifications associated with the flip-flop to be violated. When thesetup or hold time of a flip-flop is violated, the output response isuncertain. A flip-flop is metastable if its output hangs up in theregion between VIL and VIH. The metastablecondition lasts until the flip-flop recovers into one of its twostable states. With conventional flip-flops, this recovery time canbe longer than the specified maximum propagation delay.
The problem of metastability is typically solved by adding anadditional layer of synchronization. This dual-rank approach isemployed in the 74AC11478. The probability of the second stageentering the metastable state is exponentially reduced by thisdual-rank architecture. The 74AC11478 provides a one-chip solutionfor system designers in asynchronous applications.
The 74AC11478 is characterized for operation from -40°C to85°C.
[dagger] Data presented at the D inputs requirestwo clock cycles to appear at the Q outputs.
View more information about generic part numbers:74AC11478
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