SN54ACT8999, SN74ACT8999 SCAN-PATH SELECTORS WITH 8-BIT BIDIRECTIONAL DATA BUSES SCAN-CONTROLLED IEEE STD 1149.1 (JTAG) TAP MULTIPLEXERS

SCAS158D - JUNE 1990 - REVISED DECEMBER 1996

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features

• Members of theTexas Instruments SCOPE^TM Family of Testability Products
• Compatible With the IEEE Standard 1149.1 (JTAG) Serial Test Bus
• Allow Partitioning of System Scan Paths
• Can Be Cascaded Horizontally or Vertically
• Select One of Four Secondary Scan Paths to Be Included in a Primary Scan Path
• Provide Communication Between Primary and Remote Test Bus Controllers
• Include 8-Bit Programmable Binary Counter to Count or Initiate Interrupt Signals
• Include 8-Bit Identification Bus for Scan Path Identification
• Inputs Are TTL Compatible
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
• Package Options Include Plastic Small-Outline (DW) Packages, Ceramic Chip Carriers (FK), and Standard Plastic (NT) and Ceramic (JT) 300-mil DIPs

   

  SCOPE and EPIC are trademarks of Texas Instruments Incorporated.

description

The 'ACT8999 are members of the Texas InstrumentsSCOPE^TM testability integrated-circuit family. This familyof components facilitates testing of complex circuit-boardassemblies.

The 'ACT8999 enhance the scan capability of TI'sSCOPE^TM family by allowing augmentation of a system'sprimary scan path with secondary scan paths (SSPs), which can beindividually selected by the 'ACT8999 for inclusion in the primaryscan path. The device also provides buffering of test signals toreduce the need for external logic.

By loading the proper values into the instruction register anddata registers, the user can select one of four secondary scan paths.This has the effect of shortening the scan path to allow maximum testthroughput when an individual subsystem (board or box) is to betested. Any of the device's six data registers or the instructionregister can be placed in the device's scan path, i.e., placedbetween test data input (TDI) and test data output (TDO) forsubsequent shift and scan operations.

All operations of the device except counting are synchronous tothe test clock (TCK). The 8-bit programmable up/down counter can beused to count transitions on the device condition input (DCI) andoutput interrupt signals via the device condition output (DCO). Thedevice can be configured to count on either the rising or fallingedge of DCI.

If a system's test architecture contains more than one test buscontroller, the 8-bit bidirectional bus can be used to interface ahigher-level primary bus controller (PBC) with one or morelower-level remote bus controllers (RBCs). A protocol allows the PBCto pass control of the 'ACT8999 to an RBC, freeing the PBC for othertasks. The 8-bit bus also can be hardwired to provide one of 256codes for subsystem identification. The test access port (TAP)controller is a finite-state machine compatible with IEEE Standard1149.1.

The SN54ACT8999 is characterized for operation over the fullmilitary temperature range of -55°C to 125°C. TheSN74ACT8999 is characterized for operation from 0°C to70°C.

View more information about generic part numbers:SN54ACT8999, SN74ACT8999

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