SCAS154A - D3715, NOVEMBER 1990 - REVISED APRIL 1993
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This device contains eight flip-flops that feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing multiuser registers, I/O ports, bidirectional bus drivers, and working registers.
With the clock-enable (CLKEN\) input low, the eight edge-triggered D-type flip-flops enter data on the low-to-high transition of the clock. Taking CLKEN\ high disables the clock buffer, thus latching the outputs. The 74ACT11825 has noninverting data (D) inputs. Taking the clear (CLR\) input low causes the eight Q outputs to go low independently of the clock.
Multiuser buffered output-enable (OE1\, OE2\, and OE3\) inputs can be used to place the eight outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.
The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components. The output enable (OE\) does not affect the internal operation of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.
The 74ACT11825 is characterized for operation from -40°C to 85°C.
View more information about generic part numbers:74ACT11825
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