74AC11378 HEX D-TYPE FLIP-FLOPWITH CLOCK ENABLE

SCAS150 - APRIL 1991 - REVISED APRIL 1993

features

Contains Six D-Type Flip-Flops
Clock Enable Latched to Avoid False Clocking
Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Pin Configurations Minimize High-Speed Switching Noise
EPIC ^TM (Enhanced-Performance Implanted CMOS) 1-um Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline Packages, and Standard Plastic 300-mil DIPs
EPIC is a trademark of Texas Instruments Incorporated.

description

These circuits are positive-edge-triggered D-type flip-flops witha clock-enable input. Information at the D inputs meeting the setuptime requirements is transferred to the Q outputs on thepositive-going edge of the clock pulse if the clock-enable input() is low.

Clock triggering occurs at a particular voltage level and is notdirectly related to the transition time of the positive-going pulse.When the clock inputs are at either the high or low level, the data(D) input signal has no effect at the output. The circuits aredesigned to prevent false clocking by transitions at the clock-enable() input.

The 74AC11378 is characterized for operation from - 40°C to85°C.

Title: HEX D-TYPE FLIP-FLOP WITH CLOCK ENABLE
Product Family: D-TYPE FLIP-FLOPS
Device Functionality: HEX D-TYPE FLIP-FLOP
Orderable Devices: 74AC11378DW, 74AC11378N

View the complete PDF datasheet: scas150.pdf (96 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:74AC11378

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