SCAS149A - APRIL 1990 - REVISED SEPTEMBER 1995
A FIFO memory is a storage device that allows data to be writteninto and read from its array at independent data rates. TheSN74ACT2236 is arranged as two 1024 by 9-bit FIFOs for high speed andfast access times. It processes data at rates from 0 to 50 MHz withaccess times of 25 ns in a bit-parallel format.
The SN74ACT2236 consists of bus-transceiver circuits, two 1024× 9 FIFOs, and control circuitry arranged for multiplexedtransmission of data directly from the data bus or from the internalFIFO memories. Enable 
andDIR inputs are provided to control the transceiver functions. Theselect-control (SAB and SBA) inputs are provided to select whetherreal-time or stored data is transferred. The circuitry used forselect control eliminates the typical decoding glitch that occurs ina multiplexer during the transition between stored and real-timedata. Figure 1 shows the five fundamental bus-management functionsthat can be performed with the SN74ACT2236.
The SN74ACT2236 is characterized for operation from 0°C to70°C.
For more information on this device family, see the applicationreport 1K 9 2 Asynchronous FIFOs SN74ACT2235 and SN74ACT2236 in the1996 High-Performance FIFO Memories Designer's Handbook, literaturenumber SCAA012A.
View more information about generic part numbers:SN74ACT2236, SN74ACT2236-20, SN74ACT2236-30, SN74ACT2236-40, SN74ACT2236-60
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