



SCAS114 - MARCH 1990 - REVISED APRIL 1993
EPIC is a trademark of Texas Instrumentsdescription
The 74AC11648 consists of bus transceiver circuits, D-typeflip-flops, and control circuitry arranged for multiplexedtransmission of data directly from the input bus or from theinternal
registers. Data on the A or B bus is clocked into the registers onthe low-to-high transition of the appropriate clock (CLKAB or CLKBA)input. Figure 1 illustrates the four fundamental bus-managementfunctions that can be performed with the 74AC11648.
Output-enable
anddirection-control (DIR) inputs are provided to control thetransceiver functions. In the transceiver mode, data present at thehigh-impedance port may be stored in either register or in both.
The select-control (SAB and SBA) inputs can multiplex stored andreal-time (transparent mode) data. The direction control (DIR)determines which bus will receive data when
high), A datamay be stored in one register and/or B data may be stored in theother register.
When an output function is disabled, the input function is stillenabled and may be used to store and transmit data. Only one of thetwo buses, A or B, may be driven at a time.
The 74AC11648 is characterized for operation from -40°C to85°C.
View more information about generic part numbers:74AC11648
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