74ACT11379QUAD D-TYPE FLIP-FLOP WITH CLOCK ENABLE

SCAS103 - JANUARY 1990 - REVISED APRIL 1993

features

• Inputs Are TTL-Voltage Compatible
• Contains Four Flip-Flops with Double-Rail Outputs
• Clock Enable Latched to Avoid False Clocking
• Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators
• Flow-Through Architecture to Optimize PCB Layout
• Center-Pin V_CC and GND Configurations to Minimize High-Speed Switching Noise
• EPIC^TM (Enhanced-Performance Implanted CMOS) 1-um Process
• 500-mA Typical Latch-Up Immunity at 125°C
• Package Options Include Plastic Small Outline Packages, and Standard Plastic 300-mil DIPs

  EPIC is a trademark of Texas Instruments Incorporated.

description

These circuits are positive-edge-triggered D-type flip-flops with a clock-enable input.

Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if CLKEN\ is low. Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the CLKEN\ input.

The 74ACT11379 is characterized for operation from -40°C to 85°C.

View more information about generic part numbers:74ACT11379

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