74AC11377 OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE

SCAS101 - D3420, FEBRUARY 1990 - REVISED APRIL 1993

features

Contains Eight D-Type Flip-Flops
Clock Enable Latched to Avoid False Clocking
Applications Include: Buffer/Storage Registers, Shift Registers, Pattern Generators
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Configuration Minimizes High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small Outline Packages and Standard Plastic 300-mil DIPs

EPIC is a trademark of Texas Instruments

description

These circuits are positive-edge-triggered D-type flip-flops witha clock enable input.

Information at the D inputs meeting the setup time requirements istransferred to the Q outputs on the positive-going edge of the clockpulse if is low. Clocktriggering occurs at a particular voltage level and is not directlyrelated to the transition time of the positive-going pulse. When theclock input is at either the high or low level, the D input signalhas no effect at the output. The circuits are designed to preventfalse clocking by transitions at the input.

The 74AC11377 is characterized for operation from - 40°C to85°C.

Title: OCTAL D-TYPE FLIP-FLOP WITH CLOCK ENABLE
Product Family: D-TYPE FLIP-FLOPS
Device Functionality: OCTAL D-TYPE FLIP-FLOP
Orderable Devices: 74AC11377DW, 74AC11377DWR

View the complete PDF datasheet: scas101.pdf (85 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:74AC11377

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