74AC11646 OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS

SCAS079A - JULY 1987 - REVISED APRIL 1993

features

Independent Registers for A and B Buses
Multiplexed Real-Time and Stored Data
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C

EPIC is a trademark of Texas Instruments

description

The 74AC11646 consists of bus transceiver circuits, D-typeflip-flops, and control circuitry arranged for multiplexedtransmission of data directly from the input bus or from the internalregisters. Data on the A or B bus is clocked into the registers onthe low-to-high transition of the appropriate clock (CLKAB or CLKBA)input. Figure 1 illustrates the four fundamental bus-managementfunctions that can be performed with the 74AC11646.

Output-enable anddirection-control (DIR) inputs are provided to control thetransceiver functions. In the transceiver mode, data present at thehigh-impedance port may be stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored andreal-time (transparent mode) data. The direction control (DIR)determines which bus will receive data when is low. In the isolation mode( high), A datamay be stored in one register and/or B data may be stored in theother register.

When an output function is disabled, the input function is stillenabled and may be used to store and transmit data. Only one of thetwo buses, A or B, may be driven at a time.

The 74AC11646 is characterized for operation from -40°C to85°C.

Title: OCTAL BUS TRANSCEIVER AND REGISTER
Product Family: REGISTERED TRANSCEIVERS
Device Functionality: OCTAL BUS TRANSCEIVER/REGISTER
Orderable Devices: 74AC11646DW, 74AC11646DWR, 74AC11646NT

View the complete PDF datasheet: scas079a.pdf (112 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:74AC11646

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