74AC11286 9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS

SCAS068A - AUGUST 1988 - REVISED APRIL 1993

features

Generates Either Odd or Even Parity for Nine Data Lines
Cascadable for n-Bits Parity
Direct Bus Connection for Parity Generation or for Checking by Using the Parity I/O Port
Flow-Through Architecture Optimizes PCB Layout
Center-Pin V_CC and GND Configurations Minimize High-Speed Switching Noise
EPIC^TM (Enhanced-Performance Implanted CMOS) 1-m Process
500-mA Typical Latch-Up Immunity at 125°C
Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

EPIC is a trademark of Texas Instruments

description

The 74AC11286 universal 9-bit parity generator/checker features alocal output for parity checking and a bus-driving parity I/O portfor parity generation/checking. The word-length capability is easilyexpanded by cascading.

The control inputis implemented specifically to accommodate cascading. When the is low, the parity tree isdisabled and the PARITY ERROR output will remain at a high logiclevel regardless of the input levels. When is high, the parity tree isenabled. The PARITY ERROR output will indicate a parity error wheneither an even number of inputs (A through I) are high and PARITY I/Ois forced to a low logic level, or when an odd number of inputs arehigh and PARITY I/O is forced to a high logic level.

The I/O control circuitry was designed so that the I/O port willremain in the high-impedance state during power up or power down toprevent bus glitches.

The 74AC11286 is characterized for operation from - 40°C to85°C.

Title: 9-BIT PARITY GENERATOR/CHECKER WITH BUS DRIVER PARITY I/O PORTS 74AC11286
Product Family: PARITY GENERATORS AND CHECKERS
Device Functionality: 9-BIT PARITY GENERATOR/CHECKER
Orderable Devices: 74AC11286D, 74AC11286DR

View the complete PDF datasheet: scas068a.pdf (88 K Bytes) (Requires Acrobat Reader 3.x)

View more information about generic part numbers:74AC11286

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