SCAS050A - D3266, JANUARY 1989 - REVISED APRIL 1993
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The ´ACT11138 circuit is designed to be used inhigh-performance memory-decoding or data- routing applicationsrequiring very short propagation delay times. In high-performancememory systems, this decoder can be used to minimize the effects ofsystem decoding. When employed with high-speed memories utilizing afast enable circuit, the delay times of this decoder and the enabletime of the memory are usually less than the typical access time ofthe memory. This means that the effective system delay introduced bythe decoder is negligible.
The conditions at the binary select inputs and the three enableinputs select one of eight input lines. Two active-low and oneactive-high enable inputs reduce the need for external gates orinverters when expanding. A 24-line decoder can be implementedwithout external inverters and a 32-line decoder requires only oneinverter. An enable input can be used as a data input fordemultiplexing applications.
The 54ACT11138 is characterized for operation over the fullmilitary temperature range of - 55°C to 125°C. The74ACT11138 is characterized for operation from - 40°C to85°C.
View more information about generic part numbers:74ACT11138
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